More Speed & Simplicity: Practical Data-Oriented Design in C++ - Vittorio Romeo - CppCon 2025
https://cppcon.org/---More Speed & Simplicity: Practical Data-Oriented Design in C++ - Vittorio Romeo - CppCon 2025Data-Oriented Design (DOD) presents a diff...
The Tail at Scale – Communications of the ACM
Systems that respond to user actions quickly (within 100ms) feel more fluid and natural to users than those that take longer.3 Improvements in Internet connectivity and the rise of warehouse-scale computing systems2 have enabled Web services that provide fluid responsiveness while consulting multi-terabyte datasets spanning thousands of servers; for example, the Google search system updates query results interactively as the user types, predicting the most likely query based on the prefix typed so far, performing the search and showing the results within a few tens of milliseconds. Emerging augmented-reality devices (such as the Google Glass prototype7) will need associated Web services with even greater responsiveness in order to guarantee seamless interactivity.
Your RAM Has a 60 Year Old Design Flaw. I Bypassed It.
Modern DRAM is based on a brilliant design from IBM.But, we're still paying for a latency penalty that's existed since the 60s!In this video, I'm introducing...
Does lock xchg have the same behavior as mfence?
What I'm wondering is if lock xchg will have similar behavior to mfence from the perspective of one thread accessing a memory location that is being mutated (lets just say at random) by other threa...
Why is (or isn't?) SFENCE + LFENCE equivalent to MFENCE?
As we know from a previous answer to Does it make any sense instruction LFENCE in processors x86/x86_64? that we can not use SFENCE instead of MFENCE for Sequential Consistency.
An answer there su...
An answer there su...
Does it make any sense to use the LFENCE instruction on x86/x86_64 processors?
Often in internet I find that LFENCE makes no sense in processors x86, ie it does nothing , so instead MFENCE we can absolutely painless to use SFENCE, because MFENCE = SFENCE + LFENCE = SFENCE + N...
Gallery of Processor Cache Effects
Most of my readers will understand that cache is a fast but small type of memory that stores recently accessed memory locations. This description is reasonably accurate, but the “boring” details of how processor caches work can help a lot when trying to understand program performance.
The Secret to DPDK’s Lightning-Fast Packet Processing: Hugepage Memory!
DPDK’s lightning-fast packet processing is no magic trick. It’s all thanks to a humble hero: hugepage memory.
True Sharing & False Sharing
Computer systems with multiple multicore processors are becoming more popular with the evolution of technology. These systems have…
Writing a Fast and Versatile SPSC Ring Buffer – Performance Results – Kaspar Daugaard’s Blog
Kaspar Daugaard’s Blog
SIMD < SIMT < SMT: parallelism in NVIDIA GPUs
Programmable NVIDIA GPUs are very inspiring to hardware geeks, proving that processors with an original, incompatible
programming model can become widely used.
programming model can become widely used.
Building Your Own Efficient uint128 in C++ | Solidean
A practical walk-through of a fixed-width uint128 implementation in modern C++.
Fifty Things you can do with a Software Defined Radio 📻
Last week, I went on an adventure through the electromagnetic spectrum!
How Much of a Genius-Level Move Was Using Binary Space Partitioning in Doom?
A short history of the data structure that powered the classic first-person shooter.
The world in which IPv6 was a good design
Last November I went to an IETF meeting for the first time. The IETF is an
interesting place; it seems to be about 1/3 maintenance grunt wo...
interesting place; it seems to be about 1/3 maintenance grunt wo...
MOVHPS: Move High Packed Single-Precision Floating-Point Values (x86 Instruction Set Reference)
x86 assembly tutorials, x86 opcode reference, programming, pastebin with syntax highlighting
SIMD and difference between packed and scalar double precision
I am reading Intel's intrinsics guide while implementing SIMD support. I have a few confusions and my questions are as below.
__m128 _mm_cmpeq_ps (__m128 a, __m128 b) documentation says it is used to
__m128 _mm_cmpeq_ps (__m128 a, __m128 b) documentation says it is used to
CppCoreGuidelines/CppCoreGuidelines.md at master · isocpp/CppCoreGuidelines
The C++ Core Guidelines are a set of tried-and-true guidelines, rules, and best practices about coding in C++ - isocpp/CppCoreGuidelines
GitHub - NationalSecurityAgency/ghidra: Ghidra is a software reverse engineering (SRE) framework
Ghidra is a software reverse engineering (SRE) framework - NationalSecurityAgency/ghidra
Welcome to a World of OCaml
OCaml is a general-purpose, industrial-strength programming language with an emphasis on expressiveness and safety.
How hackers bypass file upload and how to prevent it? | Briskinfo
Starbucks does have the best coffee in the world. But, do they have the best cybersecurity defense? ? Johnstone discovered It was possible to execute arbitra...
HTTP/2: The Sequel is Always Worse
In this research paper James Kettle introduces multiple new classes of HTTP/2-exclusive attacks, demonstrated on popular websites and servers.
Lab: Exploiting HTTP request smuggling to bypass front-end security controls, CL.TE vulnerability | Web Security Academy
This lab involves a front-end and back-end server, and the front-end server doesn't support chunked encoding. There's an admin panel at /admin, but the ...
SecTools/SQL injection/MySQL Injection.md at master · CapitolNumbers/SecTools
Sec repository tools and information resources. Awesome. - CapitolNumbers/SecTools
GitHub - epinna/weevely3: Weaponized web shell
Weaponized web shell. Contribute to epinna/weevely3 development by creating an account on GitHub.
A fresh look on reverse proxy related attacks | Acunetix
The goal of this research is to portray the bigger picture of potential attacks on a reverse proxy or the backend servers behind it. In the main part of the article, I will show some examples of vulnerable configurations and exploitation of attacks on various reverse proxies, but the second goal of the research is to share the raw data about various implementations of reverse proxies .
The Bayesian Trap
Bayes' theorem explained with examples and implications for life.Check out Audible: http://ve42.co/audibleSupport Veritasium on Patreon: http://ve42.co/patre...
Why software projects take longer than you think: a statistical model
Anyone who built software for a while knows that estimating how long something is going to take is hard. It's hard to come up with an unbiased estimate of how long something will take, when fundamentally the work in itself is about solving something.